Debugcart: Difference between revisions

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=== Feature Wishlist ===
=== Feature Wishlist ===
* log something like "debug cart enabled" and print the available features too
* output CPU status (registers, flags) and timing info (cycle count, rasterline) to console of the host
* output CPU status (registers, flags) and timing info (cycle count, rasterline) to console of the host
* output strings to the console of the host (printf-alike, allowing memory peek)
* output strings to the console of the host (printf-alike, allowing memory peek)
* pause the emulator
* load and save blocks of memory from the host
* load and save blocks of memory from the host
* save screenshot with auto-generated filename
* save screenshot with auto-generated filename
* save vice snapshot with auto-generated filename
* Possibility to measure performance. Start/stop cycle clock and print it. Preferably nested to see the whole calling tree. Think gprof
* Block CPU until cycle x, line y. Useful for quickly testing VIC-tricks without implementing boring stable timing.
[[Category:Testbench]]
[[Category:Developer]]

Latest revision as of 18:26, 23 March 2023

The debug cartridge is a virtual "cartridge" which provides a few features for automatic testing and debugging.

primary features

The primary features are the minimal features required for the Testbench.

  • one register in I/O space. when a value is written to this register, the emulator exits with the respective value used as exit status code.
$d7ff - C64 (and VSID), C128, SCPU, DTV
$910f - VIC20 (discussion)
$fdcf - Plus4 (discussion)
$8bff - Pet
$fdaff - CBM2 series (CBM510, CBM610 etc)

the respective memory locations have been choosen so they will most likely never collide with any kind of extension, allowing to also test cartridges and i/o extensions.

secondary features

These are additional features not required by the testbench, which could be useful to debug software running on the emulator

Feature Wishlist

  • log something like "debug cart enabled" and print the available features too
  • output CPU status (registers, flags) and timing info (cycle count, rasterline) to console of the host
  • output strings to the console of the host (printf-alike, allowing memory peek)
  • pause the emulator
  • load and save blocks of memory from the host
  • save screenshot with auto-generated filename
  • save vice snapshot with auto-generated filename
  • Possibility to measure performance. Start/stop cycle clock and print it. Preferably nested to see the whole calling tree. Think gprof
  • Block CPU until cycle x, line y. Useful for quickly testing VIC-tricks without implementing boring stable timing.